CC2652R Datasheet | Texas Instruments

Features - Microcontroller - Powerful 48-MHz Arm® Cortex®-M4F processor - EEMBC Core Mark® score: 148 - 352KB of in-system programmable flash - 256KB of ROM for protocols and library functions - 8KB of cache SRAM (alternatively available as general-purpose RAM) - 80KB of ultra-low leakage SRAM. The SRAM is protected by parity to ensure high reliability of operation. - 2-pin c JTAG and JTAG debugging - Supports over-the-air (OTA) update - Ultra-low power sensor controller with 4KB of SRAM - Sample, store, and process sensor data - Operation independent from system CPU - Fast wake-up for low-power operation - TI-RTOS, drivers, bootloader, Bluetooth® 5.2 low energy controller, and IEEE 802.15.4 MAC in ROM for optimized application size - Ro HS-pliant package - 7-mm × 7-mm RGZ VQFN48 (31 GPIOs) - Peripherals - Digital peripherals can be routed to any GPIO - 4× 32-bit or 8× 16-bit general-purpose timers - 12-bit ADC, 200 k Samples/s, 8 channels - 2× parators with internal reference DAC (1× continuous time, 1× ultra-low power) - Programmable current source - 2× UART - 2× SSI (SPI, MICROWIRE, TI) - I2C and I2S - Real-time clock (RTC) - AES 128- and 256-bit cryptographic accelerator - ECC and RSA public key hardware accelerator - SHA2 accelerator (full suite up to SHA-512) - True random number generator (TRNG) - Capacitive sensing, up to 8 channels - Integrated temperature and battery monitor - External system - On-chip buck DC/DC converter - Low power - Active mode RX: 6.9 m A - Active mode TX 0 d Bm: 7.3 m A - Active mode TX 5 d Bm: 9.6 m...